发布日期:2014-12-17 访问量:
报告题目: Performance Optimization on GPUs and FPGAs.
报告人: Yun (Eric) Liang (Assistant Professor @ Peking University)
时间: 12月23日上午10:00-11:30
地点: 信息楼417会议室
Abstract:
Graphics Processing Units (GPUs) have become ubiquitous for general purpose applications due to their tremendous computing power. However, performance optimization for GPUs is not trivial. In the first part of the talk, I will present compiler and system optimization techniques on GPUs that improve the memory performance and system throughput. Compared to GPUs, FPGAs allow flexible architecture design. Designers can implement fine-grained computation units, highly parallel architectures, fine-grained pipelining of computation units. However, for FPGA design, the challenge is the programmability. In the second part of the talk, I will introduce high level synthesis (HLS) and the HLS optimization techniques based on polyhedral transformations.
Bio:
Yun (Eric) Liang is currently an assistant professor in School of EECS at Peking University, China. Before joining Peking University, he was a Research Scientist in Advanced Digital Science Center, University of Illinois at Champaign Urbana. He received the B.S degree from Tongji University, Shanghai, and the Ph.D degree in computer science from National University Singapore. He has published about 30 research papers in the top conferences and journals on embedded system, computer architecture, real-time system, and hardware. His work has received the Best Paper Award of FCCM 2011 and Best Paper Award nominations from DAC 2012, FPT 2011, and CODES+ISSS 2008.